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FPGA design and implementation of fuzzy learning control: Application on DC motor position control
                By applying the Laplace transform to the      4.1. Fixed point data type
            above equations, we obtain :
                                                              FPGA circuits generally support the following
                                                              two types of data: fixed-point data and floating-
                         (Js + b) sθ (s) = KI (s)      (10)
                                                              point data.   However, designs based on the
                                                              fixed-point data type consume fewer hardware re-
                     (Js + b) I (s) = V (s) − Ksθ (s)  (11)   sources and less power, with shorter computation
                From Equation (10) , the current formula is   times. 34
            given by:                                             However, most complex algorithms have non-
                                                              linear functions that are not supported by the
                                 (Js + b) sθ (s)              fixed-point data type.   These functions must,
                         I (s) =                       (12)
                                      K                       therefore, be approximated by other linear func-
                From Equations (11) and (12), and consider-   tions, which negatively affects the accuracy of the
            ing that the output of the system is the angular  computations. In this work, the design methodol-
            position of the motor shaft θ (s), and the input of  ogy adopted is based on MATLAB-Simulink soft-
            the system is the voltage of the armature V (s),  ware.
            the transfer function of the DC motor is :            The fixed-point representation on MATLAB-
                                                              Simulink used in this work is as follows:
                  θ (s)              K                        fixdt(s, l, d). fixdt creates a numerical type on
                       =                               (13)
                                                 2
                 V (s)   s [(Ls + R) (Js + b) + K ]           Simulink describing a fixed point. s represents
                                                              the sign bit, l the length of the binary word and
                Where :
                                                              d the length of its fractional part.
            J : Moment of inertia of the rotor
            R : Electric resistance                               For example, fixdt(1, 16, 8): Here, 16 repre-
            L : Electric inductance                           sents the length of the signal in bits, 1 is the sign
                                                              bit (signed in this case), and 8 is the length of the
            b : Motor viscous friction constant
                                                              fractional part in bits. Details of the fixed-point
            However, in our case, the numerical values of the
                                                              representation in MATLAB-Simulink are given in
            above constants are not available, so the calcula-
                                                              Table 2.
            tion of the model of the DC motor must be done
            experimentally using the Zedboard FPGA.
                                                              Table 2. Fixed-point repr´esentation in Simulink
                The DC motor is considered as a black box.
            Its identification consists of applying a voltage V     Datatypemode     Fixed − point :
            and obtaining the angular position θ of the motor.                       binarypointscaling
            Based on these measurements, the MATLAB sys-            Signedness       Signed
            tem identification toolbox 33  is used to calculate
                                                                    Wordlength       16
            the parameters of the motor model.
                                                                    Fractionlength 8
                During the identification process, it is discov-
            ered that the DC motor does not start within a        The control algorithm is developed in the
            range of voltage values. Knowing that the motor   Simulink environment as a double-precision
            supply voltage is 12V, the dead zone of this motor  floating-point model using blocks supported by
            is [-2.4V 2.4V]. The model obtained by the Sys-   the HDL Coder and then converted to a fixed-
            tem Identification Toolbox is represented by the  point model using the Fixed-Point Tool. This
            following discrete transfer function, with a sam-  tool calculates the correct integer and fractional
            pling time of T e =0.001 s.                       parts of each input/output block from the devel-
                                                              oped floating-point model, respecting the rules
                         θ(z)          b 0                    of fixed-point arithmetic and optimizing binary
                 G(z) =       =                               word lengths.
                                    2
                         V (z)   a 2 z + a 1 z + a 0
                                                       (14)
                                    16.4
                      =                                       4.2. FPGA in the loop simulation
                          2
                         z + 0.6615z + 0.00041255
                                                              Before applying it to the motor control, the
                                                              proposed algorithm must be simulated on the
            4. FPGA implementation
                                                              MATLAB-Simulink environment with the system
            Before applying the controller to the experimental  in order to test its behavior during various robust-
            device, we must first test its behavior on the Zed-  ness tests. The proposed controller is developed
            board Zynq-7000 FPGA using the FPGA-in-the-       on Simulink with the blocks of HDL Coder and
            loop (FIL) simulation technique in the Simulink   converted into a model with a fixed-point data
            environment of MATLAB.                            type, then its VHDL code is generated, which is
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