Page 56 - DP-1-1

Design+

ORIGINAL RESEARCH ARTICLE
A novel approach for designing high-accuracy

approximate signed multipliers

Faraz Baraati 1 , Abdolah Amirany * , Milad Tanavardi Nasab 3 ,
2
Kian Jafari 4,5 , and Reza Ghaderi 1
1 Faculty of Electrical Engineering, Shahid Beheshti University, Tehran, Iran
2 Department of Electrical and Computer Engineering, School of Engineering and Applied Science,
The George Washington University, Washington, DC, United States of America
3 Department of Electrical Engineering and Computer Science, University of Tennessee, Knoxville,
Tennessee, United States of America
4 Interdisciplinary Institute for Technological Innovation (3IT), Université de Sherbrooke, Sherbrooke,
Quebec, Canada
5 Faculty of Engineering, Université de Sherbrooke, Sherbrooke, Quebec, Canada

Abstract

Signed multiplication is crucial for performing arithmetic operations with positive
and negative numbers. It has applications in signal processing, digital image
processing, communication, cryptography, neural network hardware accelerators,
and more. Until today, to multiply signed numbers, the data are often converted
to unsigned format, and the sign is added to the final product. This method
imposes high hardware requirements for data conversion and presents challenges
in designing approximate multipliers. This paper proposes a novel method
*Corresponding author:
Abdolah Amirany for designing approximate signed multipliers that eliminate the need for data
(a.amirany@gwu.edu) conversion, thereby reducing the overall hardware requirement while maintaining
Citation: Baraati F, Amirany A, accuracy. Comprehensive evaluations at the system level using MATLAB and circuit-
Nasab MT, Jafari K, Ghaderi R. level performance analysis using HSPICE demonstrate that the proposed approach
A novel approach for designing offers a successful trade-off between area overhead, power consumption, and
high-accuracy approximate
signed multipliers. Design+. accuracy. The achieved trade-off makes the proposed method a promising solution
2024;1(1):3882. for optimizing digital circuits in various applications such as artificial intelligence
doi: 10.36922/dp.3882 and image processing.
Received: June 6, 2024
Accepted: July 30, 2024 Keywords: Signed multiplication; Approximate multiplier; Low-power design; Neural
Published Online: October 8, 2024 networks
Copyright: © 2024 Author(s).
This is an Open-Access article
distributed under the terms
of the Creative Commons 1. Introduction
AttributionNoncommercial License,
permitting all non-commercial use, Signed multipliers are crucial components in digital circuits and computational systems
distribution, and reproduction in any for performing arithmetic operations involving both positive and negative numbers.
1-3
medium, provided the original work
is properly cited. They serve as key components in various applications, such as signal processing, digital
image processing (DIP), digital audio processing, communication systems, cryptography,
Publisher’s Note: AccScience
4-8
Publishing remains neutral with artificial intelligence (AI), and neural network (NN) hardware accelerators. The
regard to jurisdictional claims in capability to manage signed numbers enables more flexible and precise calculations,
published maps and institutional
affiliations. which are vital in numerous practical scenarios. 9-11
Volume 1 Issue 1 (2024) 1 doi: 10.36922/dp.3882