Page 73 - IJOCTA-15-3
P. 73

FPGA design and implementation of fuzzy learning control: Application on DC motor position control
            about ±0.012. This error is practically inferior to  Acknowledgments
            that obtained with the PID controller, as shown   This paper is derived from a research grant funded
            in Figure 18.                                     by the Research, Development, and Innovation
                The experimental results obtained show good
                                                              Authority (RDIA), Kingdom of Saudi Arabia,
            position tracking and stability, with a lower er-
                                                              with grant number 13382-psu-2023- PSNU-R-3-
            ror compared to the results of the PID controller.
                                                              1-EI-. This research is supported by Automated
            These results are explained on the one hand by
                                                              Systems and Computing Lab (ASCL), Prince Sul-
            the use of the knowledge base modifier, which
                                                              tan University, Riyadh, Saudi Arabia. The au-
            modifies the membership functions in real time
                                                              thors would like to thank Prince Sultan Univer-
            according to the DC motor dynamics, and on the
                                                              sity, Riyadh, Saudi Arabia for supporting this
            other hand by the use of the Zedboard FPGA,
                                                              work.
            which provides very short sampling times and par-
            allel computation, accelerating the computation   Fundings
            time to quickly converge to the desired perfor-
                                                              This paper is funded by Prince Sultan University,
            mance.
                                                              Riyadh, Saudi Arabia. The authors would like
            6. Conclusion                                     to thank Prince Sultan University for paying the
                                                              article processing fee for this paper.
            This paper presents the implementation of a fuzzy
            logic controller FMRLC on a Zedboard FPGA to      Conflict of interest
            control the position of a DC motor. The idea was  The authors declare that have no conflict of in-
            to implement a fuzzy controller with learning on  terest.
            an FPGA board. The use of this configurable cir-
            cuit, which offers parallel data computation at a  Author contributions
            high operating frequency, aims at accelerating the
                                                              Conceptualization:   Mohand    Achour   Touat,
            computations, in particular the learning process,
            which requires a significant computation time to  Hocine Khati, Hand Talem, Ahmad Taher Azar
            converge to the desired performance.   The de-    Formal analysis: Mohand Achour Touat, Arezki
                                                              Fekik, Rabah Mellah, Ahmad Taher Azar, Saim
            sign and implementation of the controller were
                                                              Ahmed
            carried out using the MATLAB-Simulink environ-
                                                              Methodology:   Mohand Achour Touat, Hocine
            ment. This methodology allows great design flex-
                                                              Khati, Arezki Fekik, Ahmad Taher Azar
            ibility by using simple blocks on Simulink with-
                                                              Writing – original draft: Mohand Achour Touat,
            out resorting to low-level programming languages
                                                              Hocine Khati, Arezki Fekik, Ahmad Taher Azar,
            (VHDL/Verilog), thus reducing the design time of
                                                              Saim Ahmed
            the algorithm. The fixed-point data type is used
            to optimize the use of hardware resources on the  Writing – review & editing: Arezki Fekik, Ahmad
            FPGA. This binary representation can affect the   Taher Azar, Rabah Mellah, Saim Ahmed
            accuracy of calculations, but the design results in  Availability of data
            low power and resource consumption compared to
            floating-point based designs. 34                  The original contributions presented in the study
                The FMRLC controller was first tested using   are included in the article/supplementary mate-
            the FIL technique in Simulink, then implemented   rial, further inquiries can be directed to the cor-
            on the Zedboard and applied to the experimental   responding author/s.
            device. The FIL simulation results showed good    References
            tracking performance and good robustness to dis-
            turbances. The experimental results showed the     1. Kemal U, Beyza Nur A. Adaptive MIMO fuzzy
            efficiency of the proposed controller compared to     PID controller based on peak observer. Int J Op-
            the conventional controller (PID), which can be       tim Control: Theor Appl. 2023;13(2):139–150.
            explained by the controller adapting the parame-   2. Masjudin, Alimuddin, Aisah SN, Wiryadinata R.
                                                                  Dc motor speed control based on fuzzy adaptive
            ters of the membership functions to each different
                                                                  with fuzzy model reference learning control (fm-
            situations. The design methodology used to im-
                                                                  rlc) algorithm. In: 2020 2nd International Con-
            plement the algorithm on the Zedboard FPGA
                                                                  ference on Industrial Electrical and Electronics
            board allowed to obtain a fast and accurate algo-
                                                                  (ICIEE). IEEE; 2020: 79-83.
            rithm with an optimal consumption of hardware      3. Devashish J, Arifa A, Sanatan K, Debanjan R.
            resources. The co-simulation results and the ex-      Fuzzy-PID and interpolation: a novel synergetic
            perimental results demonstrated the effectiveness     approach to process control. Int J Optim Control:
            of this design methodology.                           Theor Appl. 2024;14(4):355-364.
                                                           445
   68   69   70   71   72   73   74   75   76   77   78